AMS Verification

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AMS Verification

Analog/Mixed-Signal Verification

Synopsys addresses the most critical issues in AMS verification. HSPICE® is employed by leading semiconductor foundries to provide designers with the gold standard for accuracy in device modeling. The CustomSim™ solution unifies Synopsys’ best-in-class circuit simulation technologies to deliver superior verification performance and capacity for all classes of design, including custom digital, memory and analog/mixed-signal. For comprehensive mixed-signal verification, the CustomSim solution is tightly integrated with the VCS® functional verification solution for multi-language support, including SystemVerilog, Verilog, VHDL and Verilog-AMS.

Tools

Circuit Simulation
Performance, accuracy and capacity for AMS verification more

	CustomSim	Unified Circuit Simulation Solution for Nanometer Designs DOWNLOAD DATASHEET

	HSIM	High performance hierarchical simulation for analog, mixed-signal, memory and SOC designs, with high capacity for analysis of post-layout parasitic effects.

	HSPICE	The industry's "gold standard" for accuracy, offers foundry-certified device models with state-of-the-art simulation and analysis algorithms. DOWNLOAD DATASHEET(PDF)

	NanoSim	Comprehensive simulation and analysis for high performance analog, digital and SOC designs, with powerful built-in timing and power diagnostic functions.

	XA Technology	Next-generation transistor-level simulation technology provides out of the box SPICE accuracy with FastSPICE performance and capacity. DOWNLOAD DATASHEET(PDF)

Analog Digital Co-Sim
Multi-language support for SPICE, Verilog-A/MS, Verilog, VHDL more

AMS Co-Sim

Synopsys’ mixed-signal verification solution based on industry leading “golden” simulators: VCS® and CustomSim

Design Analysis
Avoid wasted simulation time. Better mixed-signal chips... faster! more

	Circuit Check	Circuit Check increases verification coverage and discovers potential trouble spots that simulation misses.

	HSIM^plus	Dynamic IR drop and electromigration analysis of power and signal nets with post-layout acceleration. HCI/NBTI impact on MOSFET aging and device reliability.

	CustomExplorer	Debugging environment with pre-simulation Spice-centric productivity resources, netlist debugging and extensive post-simulation waveform analysis/reporting.

	Custom WaveView	Post-simulation high-performance analog / mixed-signal waveform analyzer.